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Final Electrical Specifications LTC4440 High Speed, High Voltage High Side Gate Driver October 2003 FEATURES s s DESCRIPTION The LTC(R)4440 is a high frequency high side N-channel MOSFET gate driver that is designed to operate in applications with VIN voltages up to 80V. The LTC4440 can also withstand and continue to function during 100V VIN transients. The powerful driver capability reduces switching losses in MOSFETs with high gate capacitances. The LTC4440's pull-up has a peak output current of 2.4A and its pull-down has an output impedance of 1.5. The LTC4440 features supply independent TTL/CMOS compatible input thresholds with 350mV of hysteresis. The input logic signal is internally level-shifted to the bootstrapped supply, which may function at up to 115V above ground. The LTC4440 contains both high side and low side undervoltage lockout circuits that disable the external MOSFET when activated. The LTC4440 is available in the low profile (1mm) SOT-23 or a thermally enhanced 8-lead MSOP package. , LTC and LT are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. s s s s s s s s s Wide Operating VIN Range: Up to 80V Rugged Architecture Tolerant of 100V VIN Transients Powerful 1.5 Driver Pull-Down Powerful 2.4A Peak Current Driver Pull-Up 7ns Fall Time Driving 1000pF Load 10ns Rise Time Driving 1000pF Load Drives Standard Threshold MOSFETs TTL/CMOS Compatible Inputs with Hysteresis Input Thresholds are Independent of Supply Undervoltage Lockout Low Profile (1mm) SOT-23 (ThinSOT)TM or Thermally Enhanced 8-Pin MSOP Packages APPLICATIO S s s s s Telecommunications Power Systems Distributed Power Architectures Server Power Supplies High Density Power Modules TYPICAL APPLICATIO VIN 36V TO 72V 100V PEAK TRANSIENT (ABS MAX) VCC 8V TO 15V Synchronous Phase-Modulated Full-Bridge Converter LTC4440 Driving a 1000pF Capacitive Load LTC4440 VCC BOOST INP GND TG TS INPUT (INP) 2V/DIV LTC4440 VCC LTC3722-1 VCC BOOST INP GND TG TS 4440 TA01 OUTPUT (TG - TS) 5V/DIV * * 10ns/DIV 4440 F02 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U U U 4440i 1 LTC4440 ABSOLUTE MAXIMUM RATINGS Supply Voltage VCC ....................................................... - 0.3V to 15V BOOST - TS ......................................... - 0.3V to 15V INP Voltage ............................................... - 0.3V to 15V BOOST Voltage (Continuous) ................... - 0.3V to 95V BOOST Voltage (100ms) ........................ - 0.3V to 115V TS Voltage (Continuous) ............................. - 5V to 80V TS Voltage (100ms) ................................... - 5V to 100V PACKAGE/ORDER INFORMATION TOP VIEW INP GND VCC GND 1 2 3 4 8 7 6 5 TS TG BOOST NC ORDER PART NUMBER LTC4440EMS8E MS8E PART MARKING LTF9 VCC 1 GND 2 INP 3 9 MS8E PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150C, JA = 40C/W (NOTE 4) EXPOSED PAD IS GND (PIN 9) MUST BE SOLDERED TO PCB Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS SYMBOL IVCC PARAMETER DC Supply Current Normal Operation UVLO Undervoltage Lockout Threshold Main Supply (VCC) The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = VBOOST = 12V, VTS = GND = 0V, unless otherwise noted. CONDITIONS MIN TYP MAX UNITS INP = 0V VIN < UVLO Threshold - 0.1V VCC Rising VCC Falling Hysteresis q q UVLO Bootstrapped Supply (BOOST - TS) IBOOST DC Supply Current Normal Operation UVLO Undervoltage Lockout Threshold INP = 0V VBOOST - VTS < UVLOHS - 0.1V, INP = 0V VBOOST - VTS Rising VBOOST - VTS Falling Hysteresis INP Ramping High INP Ramping Low q q UVLOHS Input Signal (INP) VIH VIL VIH - VIL IINP High Input Threshold Low Input Threshold Input Voltage Hysteresis Input Pin Bias Current q q 2 U U W WW U W (Note 1) Peak Output Current < 1s (TG) ............................... 4A Driver Output TG (with Respect to TS) ..... - 0.3V to 15V Operating Ambient Temperature Range (Note 2) .............................................. - 40C to 85C Junction Temperature (Note 3) ............................ 150C Storage Ambient Temperature Range ... - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C TOP VIEW 6 BOOST 5 TG 4 TS ORDER PART NUMBER LTC4440ES6 S6 PART MARKING LTZY S6 PACKAGE 6-LEAD PLASTIC SOT-23 TJMAX = 150C, JA = 230C/W 250 25 5.7 5.4 6.5 6.2 300 400 80 7.3 7.0 A A V V mV 110 86 6.75 6.25 7.4 6.9 500 1.6 1.25 0.350 0.01 180 170 7.95 7.60 A A V V mV V V V A 4440i 1.3 0.85 2 1.6 2 LTC4440 ELECTRICAL CHARACTERISTICS SYMBOL VOH VOL IPU RDS tr tf tPLH tPHL PARAMETER High Output Voltage Low Output Voltage Peak Pull-Up Current Output Pull-Down Resistance Output Rise Time Output Fall Time Output Low-High Propagation Delay Output High-Low Propagation Delay Output Gate Driver (TG) The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = VBOOST = 12V, VTS = GND = 0V, unless otherwise noted. CONDITIONS ITG = -10mA, VOH = VBOOST - VTG ITG = 100mA q q q MIN TYP 0.7 150 MAX UNITS V 220 2.2 mV A ns ns ns ns 1.7 2.4 1.5 10 100 7 70 Switching Timing 10% - 90%, CL = 1nF 10% - 90%, CL = 10nF 10% - 90%, CL = 1nF 10% - 90%, CL = 10nF q q 30 28 65 65 ns ns Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC4440 is guaranteed to meet performance specifications from 0C to 70C. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD * JAC/W) Note 4: Failure to solder the exposed back side of the MS8E package to the PC board will result in a thermal resistance much higher than 40C/W. TYPICAL PERFOR A CE CHARACTERISTICS VCC Supply Quiescent Current vs Voltage 300 250 QUIESCENT CURRENT (A) INP = VCC 200 150 100 50 0 QUIESCENT CURRENT (A) TA = 25C 500 INP = 0V 450 400 350 300 250 200 150 100 50 0 0 5 10 VCC SUPPLY VOLTAGE (V) 15 4440 G01 OUTPUT (TG - TS) VOLTAGE (mV) UW BOOST - TS Supply Quiescent Current vs Voltage TA = 25C 160 155 150 145 140 135 130 Output Low Voltage (VOL) vs Supply Voltage ITG = 100mA TA = 25C INP = VCC INP = 0V 0 10 5 BOOST - TS SUPPLY VOLTAGE (V) 15 4440 G02 8 12 14 11 13 9 10 BOOST - TS SUPPLY VOLTAGE (V) 15 4440 G03 4440i 3 LTC4440 TYPICAL PERFOR A CE CHARACTERISTICS Output High Voltage (VOH) vs Supply Voltage 15 OUTPUT VOLTAGE (TG - TS) (V) VCC SUPPLY QUIESCENT CURRENT (A) TA = 25C 1.8 14 INPUT THRESHOLD (V) 13 ITG = -1mA 12 11 10 9 8 7 8 9 13 14 10 12 11 BOOST - TS SUPPLY VOLTAGE (V) 15 4440 G04 ITG = -10mA ITG = -100mA 2MHz Operation 300 INPUT (INP) 5V/DIV CURRENT (A) VCC SUPPLY VOLTAGE (V) OUTPUT (TG) 5V/DIV VCC = 12V 250ns/DIV Boost Supply Current vs Temperature 500 450 400 CURRENT (A) INP = 12V BOOST - TS SUPPLY VOLTAGE (V) INPUT THRESHOLD (V) 350 300 250 200 150 100 50 0 -60 -30 0 30 60 90 120 4440 G10 INP = 0V TEMPERATURE (C) 4 UW 4440 G07 Input Thresholds (INP) vs Supply Voltage 2.0 TA = 25C VIH (INPUT HIGH THRESHOLD) VCC Supply Current at TTL Input Levels 380 360 340 320 300 280 INP = 0.8V 260 240 220 200 8 12 10 VCC SUPPLY VOLTAGE (V) 14 4440 G06 TA = 25C INP = 2V 1.6 1.4 1.2 1.0 0.8 7 9 11 13 VCC SUPPLY VOLTAGE (V) 15 4440 G05 VIL (INPUT LOW THRESHOLD) VCC Supply Current (VCC = 12V) vs Temperature 6.45 INP = 0V INP = 12V 6.40 6.35 6.30 6.25 6.20 VCC Undervoltage Lockout Thresholds vs Temperature 250 200 150 100 50 0 -60 RISING THRESHOLD FALLING THRESHOLD 6.15 6.10 -30 0 30 60 90 120 4440 G08 6.05 -60 -30 0 30 60 90 120 4440 G09 TEMPERATURE (C) TEMPERATURE (C) Boost Supply (BOOST - TS) Undervoltage Lockout Thresholds vs Temperature 7.6 7.5 7.4 7.3 7.2 7.1 7.0 6.9 6.8 6.7 -60 -30 0 30 60 90 120 4440 G11 Input Threshold vs Temperature 2.0 VIH (VCC = 12V) 1.8 1.6 1.4 1.2 1.0 0.8 -60 VIH (VCC = 8V) VIL (VCC = 12V) VIL (VCC = 15V) VIL (VCC = 8V) VIH (VCC = 15V) RISING THRESHOLD FALLING THRESHOLD -30 0 30 60 90 120 4440 G12 TEMPERATURE (C) TEMPERATURE (C) 4440i LTC4440 TYPICAL PERFOR A CE CHARACTERISTICS Input Threshold Hysteresis vs Temperature 500 480 460 HYSTERESIS (mV) 440 420 400 PEAK CURRENT (A) 380 VIH-VIL (VCC = 8V) 360 340 320 300 -60 -30 0 30 60 90 120 4440 G13 Output Driver Pull-Down Resistance vs Temperature 3.0 2.5 45 40 PROPAGATION DELAY (ns) 2.0 RDS () BOOST - TS = 12V BOOST - TS = 8V 1.5 BOOST - TS = 15V 1.0 0.5 0 -60 -30 PI FU CTIO S SOT-23 Package VCC (Pin 1): Chip Supply. This pin powers the internal low side circuitry. A low ESR ceramic bypass capacitor should be tied between this pin and the GND pin (Pin 2). GND (Pin 2): Chip Ground. INP (Pin 3): Input Signal. TTL/CMOS compatible input referenced to GND (Pin 2). TS (Pin 4): Top (High Side) Source Connection. TG (Pin 5): High Current Gate Driver Output (Top Gate). This pin swings between TS and BOOST - 0.7V. BOOST (Pin 6): High Side Bootstrapped Supply. An external capacitor should be tied between this pin and TS (Pin 4). Normally, a bootstrap diode is connected between VCC (Pin 1) and this pin. Voltage swing at this pin is from VCC - VD to VIN + VCC - VD, where VD is the forward voltage drop of the bootstrap diode. 4440i UW 0 30 Peak Driver (TG) Pull-Up Current vs Temperature 3.0 2.9 2.8 BOOST - TS = 15V VIH-VIL (VCC = 12V) VIH-VIL (VCC = 15V) 2.7 2.6 2.5 2.4 2.3 2.2 2.1 2.0 -60 -30 0 30 60 90 120 4440 G14 BOOST - TS = 12V TEMPERATURE (C) TEMPERATURE (C) Propagation Delay vs Temperature (VCC = BOOST = 12V) 35 30 25 20 15 10 5 tPLH tPHL 60 90 120 4440 G15 0 -60 -30 0 30 60 90 120 4440 G16 TEMPERATURE (C) TEMPERATURE (C) U U U 5 LTC4440 PI FU CTIO S Exposed Pad MS8E Package INP (Pin 1): Input Signal. TTL/CMOS compatible input referenced to GND (Pin 2). GND (Pins 2, 4): Chip Ground. VCC (Pin 3): Chip Supply. This pin powers the internal low side circuitry. A low ESR ceramic bypass capacitor should be tied between this pin and the GND pin (Pin 2). NC (Pin 5): No Connect. No connection required. For convenience, this pin may be tied to Pin 6 (BOOST) on the application board. BOOST (Pin 6): High Side Bootstrapped Supply. An external capacitor should be tied between this pin and TS (Pin 8). Normally, a bootstrap diode is connected between VCC (Pin 3) and this pin. Voltage swing at this pin is from VCC - VD to VIN + VCC - VD, where VD is the forward voltage drop of the bootstrap diode. TG (Pin 7): High Current Gate Driver Output (Top Gate). This pin swings between TS and BOOST. TS (Pin 8): Top (High Side) Source Connection. Exposed Pad (Pin 9): Ground. Must be electrically connected to Pins 2, 4. BLOCK DIAGRA 8V TO 15V GND TI I G DIAGRA 6 W W U U UW U BOOST VCC UNDERVOLTAGE LOCKOUT HIGH SIDE UNDERVOLTAGE LOCKOUT VIN UP TO 80V, TRANSIENT UP TO 100V TG TS BOOST INP LEVEL SHIFTER 4440 BD GND TS INPUT RISE/FALL TIME < 10ns INPUT (INP) VIH VIL OUTPUT (TG) tr tPLH tf tPHL 90% 10% 4440 TD 4440i LTC4440 APPLICATIO S I FOR ATIO Overview The LTC4440 receives a ground-referenced, low voltage digital input signal to drive a high side N-channel power MOSFET whose drain can float up to 100V above ground, eliminating the need for a transformer between the low voltage control signal and the high side gate driver. The LTC4440 normally operates in applications with input supply voltages (VIN) up to 80V, but is able to withstand and continue to function during 100V, 100ms transients on the input supply. The powerful output driver of the LTC4440 reduces the switching losses of the power MOSFET, which increase with transition time. The LTC4440 is capable of driving a 1nF load with 10ns rise and 7ns fall times using a bootstrapped supply voltage VBOOST-TS of 12V. Input Stage The LTC4440 employs TTL/CMOS compatible input thresholds that allow a low voltage digital signal to drive standard power MOSFETs. The LTC4440 contains an internal voltage regulator that biases the input buffer, allowing the input thresholds (VIH = 1.6V, VIL = 1.25V) to be independent of variations in VCC. The 350mV hysteresis between VIH and VIL eliminates false triggering due to noise during switching transitions. However, care should be taken to keep this pin from any noise pickup, especially in high frequency, high voltage applications. The LTC4440 input buffer has a high input impedance and draws negligible input current, simplifying the drive circuitry required for the input. Output Stage A simplified version of the LTC4440's output stage is shown in Figure 3 . The pull-down device is an N-channel MOSFET (N1) and the pull-up device is an NPN bipolar junction transistor (Q1). The output swings from the lower rail (TS) to within an NPN VBE (~ 0.7V) of the positive rail (BOOST). This large voltage swing is important in driving external power MOSFETs, whose RDS(ON) is inversely proportional to its gate overdrive voltage (VGS - VTH). LTC4440 Q1 TG POWER MOSFET N1 CGS CGD U BOOST VIN UP TO 100V TS LOAD INDUCTOR V- 4440 F03 W UU Figure 3. Capacitance Seen by TG During Switching The LTC4440's peak pull-up (Q1) current is 2.4A while the pull-down (N1) resistance is 1.6. The low impedance of N1 is required to discharge the power MOSFET's gate capacitance during high-to-low signal transitions. When the power MOSFET's gate is pulled low (gate shorted to source through N1) by the LTC4440, its source (TS) is pulled low by its load (e.g., an inductor or resistor). The slew rate of the source/gate voltage causes current to flow back to the MOSFET's gate through the gate-to-drain capacitance (CGD). If the MOSFET driver does not have sufficient sink current capability (low output impedance), the current through the power MOSFET's CGD can momentarily pull the gate high, turning the MOSFET back on. A similar scenario exists when the LTC4440 is used to drive a low side MOSFET. When the low side power MOSFET's gate is pulled low by the LTC4440, its drain voltage is pulled high by its load (e.g., inductor or resistor). The slew rate of the drain voltage causes current to flow back to the MOSFET's gate through its gate-to-drain capacitance. If the MOSFET driver does not have sufficient sink current capability (low output impedance), the current through the power MOSFET's CGD can momentarily pull the gate high, turning the MOSFET back on. 4440i 7 LTC4440 APPLICATIO S I FOR ATIO Rise/Fall Time Since the power MOSFET generally accounts for the majority of the power loss in a converter, it is important to quickly turn it on or off, thereby minimizing the transition time in its linear region. The LTC4440 can drive a 1nF load with a 10ns rise time and 7ns fall time. The LTC4440's rise and fall times are determined by the peak current capabilities of Q1 and N1. The predriver that drives Q1 and N1 uses a nonoverlapping transition scheme to minimize cross-conduction currents. N1 is fully turned off before Q1 is turned on and vice versa. Power Dissipation To ensure proper operation and long-term reliability, the LTC4440 must not operate beyond its maximum temperature rating. Package junction temperature can be calculated by: TJ = TA + PD (JA) where: TJ = Junction Temperature TA = Ambient Temperature PD = Power Dissipation JA = Junction-to-Ambient Thermal Resistance Power dissipation consists of standby and switching power losses: PD = PSTDBY + PAC where: PSTDBY = Standby Power Losses PAC = AC Switching Losses 8 U The LTC4440 consumes very little current during standby. The DC power loss at VCC = 12V and VBOOST-TS = 12V is only (250A + 110A)(12V) = 4.32mW. AC switching losses are made up of the output capacitive load losses and the transition state losses. The capacitive load losses are primarily due to the large AC currents needed to charge and discharge the load capacitance during switching. Load losses for the output driver driving a pure capacitive load COUT would be: Load Capacitive Power = (COUT)(f)(VBOOST-TS)2 The power MOSFET's gate capacitance seen by the driver output varies with its VGS voltage level during switching. A power MOSFET's capacitive load power dissipation can be calculated using its gate charge, QG. The QG value corresponding to the MOSFET's VGS value (VCC in this case) can be readily obtained from the manufacturer's QG vs VGS curves: Load Capacitive Power (MOS) = (VBOOST-TS)(QG)(f) Transition state power losses are due to both AC currents required to charge and discharge the driver's internal nodal capacitances and cross-conduction currents in the internal gates. Undervoltage Lockout (UVLO) The LTC4440 contains both low side and high side undervoltage lockout detectors that monitor VCC and the bootstrapped supply VBOOST-TS. When VCC falls below 6.2V, the internal buffer is disabled and the output pin OUT is pulled down to TS. When VBOOST - TS falls below 6.9V, OUT is pulled down to TS. When both supplies are undervoltage, OUT is pulled low to TS and the chip enters a low current mode, drawing approximately 25A from VCC and 86A from BOOST. 4440i W UU LTC4440 APPLICATIO S I FOR ATIO Bypassing and Grounding The LTC4440 requires proper bypassing on the VCC and VBOOST-TS supplies due to its high speed switching (nanoseconds) and large AC currents (Amperes). Careless component placement and PCB trace routing may cause excessive ringing and under/overshoot. To obtain the optimum performance from the LTC4440: A. Mount the bypass capacitors as close as possible between the VCC and GND pins and the BOOST and TS pins. The leads should be shortened as much as possible to reduce lead inductance. B. Use a low inductance, low impedance ground plane to reduce any ground drop and stray capacitance. Remember that the LTC4440 switches >2A peak currents and any significant ground drop will degrade signal integrity. U C. Plan the power/ground routing carefully. Know where the large load switching current is coming from and going to. Maintain separate ground return paths for the input pin and the output power stage. D. Keep the copper trace between the driver output pin and the load short and wide. E. When using the MS8E package, be sure to solder the exposed pad on the back side of the LTC4440 package to the board. Correctly soldered to a 2500mm2 doublesided 1oz copper board, the LTC4440 has a thermal resistance of approximately 40C/W. Failure to make good thermal contact between the exposed back side and the copper board will result in thermal resistances far greater than 40C/W. 4440i W UU 9 LTC4440 TYPICAL APPLICATIO L2 150nH 11 12V D Q9 Si7852DP x2 Si7852DP x2 2* 8 L1 0.85H 12V -VOUT C1 0.82F 100V +VOUT * 10 * B Q7 + *7 C13, C36 180F 16V x2 VHIGH Si7852DP x4 Si7852DP x4 1F 12V 35A Q10 Q16 499 ISNS D12 D14 1 T5 1(1.5mH):0.5:0.5 0.02 1.5W 0.02 1.5W C14 68F 20V 12V 6 -VOUT Q25 T4 5:5(105H):1:1 Q17 +VOUT Q26 Q18 +VOUT + * L4 1mH -VOUT *3 1 C1-C5: VITRAMON VJ1812Y824KXBAT C13, C36: SANYO 16SP180M C14: AVX TPSE686M020R0150 C30: MuRata DE2E3KH222MB3B D1, D5, D21, D22: MURS120T3 D12, D14, D23, D24: BAS21 D15, D17, D26: BAT54 D16: MMBZ5229B D20: MMBZ5231B D27: MMBZ5242B L1: PA1294.910 L2: PULSE PA0651 L4: COILCRAFT DO1608C-105 L5: SUMIDA CDEP105-1R3MC-50 Q7, Q9, Q25, Q26: ZETEX FMMT619 Q10, Q16-Q18: ZETEX FMMT718 Q35: MMBT3906 T1, T4: PULSE PA0526 T5: PULSE PA0297 * 22 8 5 ISNS A C 20 19 15 11 OUTA OUTB OUTC OUTD OUTF LTC3722-1 DPRG NC SYNC 2 5.1k 220pF 180pF 10k 33k 8 1 24 13 5 9 21 B D 17 16 OUTE CS 3 750 7 6 5VREF 75k 0.1F 6 4.7k D15 100 1/4W D17 330pF +VOUT D16 4.3V *4 220pF 7 5 OUT2 OUT1 3 LTC1693-1 6 IN2 VCC2 1 8 IN1 VCC1 2 4 GND2 GND1 0.1F -VOUT +VOUT MOC207 4 3 470 1/4W 330 1 0.047F 3 6 23 22 68nF D26 120k Q35 7 4 330pF 100k 2.2nF C30 2.2nF 250V 5 8 2 D20 5.1V 2.7k 20k 220pF VIN 12V 20k 1/4W MMBT3904 4.99k 100 10 SBUS ADLY PDLY 9.53k 10k 22nF 182k 18 VIN 12 14 150k UVLO V REF CT SPRG RLEB FB GND PGND SS COMP 30.1k 1.5nF D27 12V 5VREF 2 4 V+ COMP RTOP LT1431 8 1 COLL REF GNDF GNDS RMID 6 5 7 2.49k 0.1F 1F 0.47F 4440 TA03 U 10 LTC3722/LTC4440 420W 36V-72V Input to 12V/35A Isolated Full-Bridge Supply 51 2W D21 0.33F D23 D24 D22 4 0.33F 11 D1 13k 1/2W +VOUT 51 2W 3 12V T1 5:5(105H):1:1 3 L5 1.3H VIN +VIN 36V TO 72V -VIN C2 0.82F 100V C3, C4, C5 0.82F 100V x3 12V * 10 Si7852DP x2 2* 8 4 0.22F D5 VCC LTC4440EMS8E 6 BOOST 1 7 IN A TG 820pF 200V 15 1.5W VHIGH GND GND 4 4 2 8 2 8 0.22F TS VCC LTC4440EMS8E 6 BOOST 1 Si7852DP 7 IN C TG x2 GND GND TS *7 4440i LTC4440 PACKAGE DESCRIPTION MS8E Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1662) 2.794 0.102 (.110 .004) 0.889 0.127 (.035 .005) 3.00 0.102 (.118 .004) (NOTE 3) 5.23 (.206) MIN 2.083 0.102 3.20 - 3.45 (.082 .004) (.126 - .136) 0.254 (.010) 0.42 0.038 (.0165 .0015) TYP 0.65 (.0256) BSC GAUGE PLANE 0.53 0.152 (.021 .006) DETAIL "A" 0.18 (.007) 1.10 (.043) MAX RECOMMENDED SOLDER PAD LAYOUT SEATING NOTE: PLANE 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.62 MAX 0.95 REF 3.85 MAX 2.62 REF RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.20 BSC 1.00 MAX DATUM `A' 0.30 - 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 0.09 - 0.20 (NOTE 3) U 8 7 65 0.52 (.0205) REF 1 2.06 0.102 (.081 .004) 1.83 0.102 (.072 .004) DETAIL "A" 0 - 6 TYP 4.90 0.152 (.193 .006) 3.00 0.102 (.118 .004) (NOTE 4) 1 23 4 0.86 (.034) REF 8 BOTTOM VIEW OF EXPOSED PAD OPTION 0.22 - 0.38 (.009 - .015) TYP 0.65 (.0256) BSC 0.127 0.076 (.005 .003) MSOP (MS8E) 0603 S6 Package 6-Lead Plastic SOT-23 (Reference LTC DWG # 05-08-1636) 2.90 BSC (NOTE 4) 1.22 REF 1.4 MIN 2.80 BSC 1.50 - 1.75 (NOTE 4) PIN ONE ID 0.95 BSC 0.80 - 0.90 0.30 - 0.45 6 PLCS (NOTE 3) 0.01 - 0.10 1.90 BSC S6 TSOT-23 0302 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 4440i 11 LTC4440 TYPICAL APPLICATIO L5 0.56H +VIN 48V -VIN 1F 100V 1F 100V 11V 1 VCC LTC4440ES6 6 BOOST 3 5 A IN TG GND 2 TS 4 0.22F 12V Si7852DP x2 1 L4 1mH C14 68F 1F 100V 1F 100V T2 70(980H):1 8 1 CS+ 1F Si7852DP 100V x2 1F 100V VIN 2 7 LTC3723-2/LTC4440 240W 42V-56V Input 94.5% Efficient Unregulated 12V Half-Bridge Converter * D23 VIN 12V MMBT3904 11V A 15k 1/4W 215k 120 5 1F 15 VCC 6 DRVA DRVB UVLO DPRG 12 1nF 30.1k 12V MMBZ5242B 1F 62k 330pF RELATED PARTS PART NUMBER LTC1154 LTC1155 DESCRIPTION High Side Micropower MOSFET Drivers Dual Micropower High/Low Side Drivers with Internal Charge Pump LT(R)1161 Quad Protected High Side MOSFET Driver LTC1163 Triple 1.8V to 6V High Side MOSFET Driver LT1339 High Power Synchronous DC/DC Controller LTC1535 Isolated RS485 Transceiver LTC1693 Family High Speed Dual MOSFET Drivers LT3010/LT3010-5 50mA, 3V to 80V Low Dropout Micropower Regulators LT3430 High Voltage, 3A, 200kHz Step-Down Switching Regulator LTC3722-1/ Synchronous Dual Mode Phase Modulated Full-Bridge LTC3722-2 Controllers LT3781/LTC1698 36V to 72V Input Isolated DC/DC Converter Chip Set COMMENTS Internal Charge Pump, 4.5V to 48V Supply Range, tON = 80s, tOFF = 28s 4.5V to 18V Supply Range 8V to 48V Supply Range, tON = 200s, tOFF = 28s 1.8V to 6V Supply Range, tON = 95s, tOFF = 45s Current Mode Operation Up to 60V, Dual N-Channel Synchronous Drive 2500VRMS of Isolation Between Line Transceiver and Logic Level Interface 1.5A Peak Output Current, 4.5V VIN 13.2V Low Quiescent Current (30A), Stable with Small (1F) Ceramic Capacitor Input Voltages Up to 60V, Internal 0.1 Power Switch, Current Mode Architecture, 16-Pin Exposed Pad TSSOP Package Adaptive Zero Voltage Switching, High Output Power Levels (Up to Kilowatts) Synchronous Rectification; Overcurrent, Overvoltage, UVLO Protection; Power Good Output Signal; Voltage Margining; Compact Solution 4440i 12 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 q FAX: (408) 434-0507 q U * 9 L6 0.22H +VOUT * 4 3 11 500pF 100V C30 2.2nF 250V 10 1W * + Si7370DP x2 * * C32 180F 16V 3 7 5 Si7370DP x2 1F -VOUT D8 D9 Q18 B + D12 D14 6 * T1 5T:4T(75H): 4T:2T:2T Q17 -VOUT T3 1.5mH 1:0.5:0.5 *3 1 * 22 0.1F 8 4 2 SDRB LTC3723-2 VREF RAMP CT SPRG GND CS 1 9 150pF 0.47F 10k 470pF 8 16 7 10 SS 14 3 SDRA COMP FB 13 6 4.7k BAT54 100 1/4W 220pF *4 330pF 5 BAT54 5 7 OUT1 OUT2 3 LTC1693-1 6 IN2 VCC2 1 8 IN1 VCC1 2 4 GND2 GND1 MMBT3904 1k 1F +VOUT MMBZ5240B 10V -VOUT 11 CS+ B 0.22F 1k 0.47F 4.7k 2N7002 D26 7.5 D27 7.5 4440 TA04 1F, 100V: TDK C4532X7R2A105M C14: AVX TPSE686M020R0150 C30: MuRata DE2E3KH222MB3B C32: SANYO 16SP180M D8, D9, D26, D27: MMBD914 D12, D14, D23: BAS21 L4: COILCRAFT DO1608C-105 L5: COILCRAFT DO1813P-561HC L6: SUMIDA CDEP105-0R2NC-50 Q17, Q18: ZETEX FMMT718 T1: PULSE PA0901-005 T2: PULSE P8207 T3: PULSE PA0297 LT/TP 1003 1K * PRINTED IN USA www.linear.com (c) LINEAR TECHNOLOGY CORPORATION 2003 |
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